; this file was automatically created from
;  ./include/chameleon.h
; do not edit!
VGAMODE	=	$d040 ; FIXME: VGAMOD in progman 
VGACTRL	=	$d041 ; FIXME: VGACFG in progman 
VGACOL	=	$d042 ; FIXME: obsolet 
VGARQT	=	$d043
VGAW	=	$d044
VGAH	=	$d045
VGAHWH	=	$d046
VGAHZ	=	$d047
VGAMODE_800_600_72	=	0
VGAMODE_800_600_50	=	1
VGAMODE_800_600_60	=	2
VGAMODE_800_600_75	=	3
VGAMODE_640_480_50	=	4
VGAMODE_640_480_60	=	5
VGAMODE_640_480_72	=	6
VGAMODE_640_480_75	=	7
VGAMODE_640_480_85	=	8
VGAMODE_1024_768_50	=	9
VGAMODE_1024_768_60	=	10
VGAMODE_1024_768_72	=	11
VGAMODE_1024_768_75	=	12
VGAMODE_1024_768_85	=	13
VGAMODE_1152_864_50	=	14
VGAMODE_1152_864_60	=	15
VGAMODE_1152_864_72	=	16
VGAMODE_1152_864_75	=	17
VGAMODE_1152_864_85	=	18
VGAMODE_1280_1024_50	=	19
VGAMODE_1280_1024_60	=	20
VGAMODE_1280_1024_72	=	21
VGAMODE_1280_1024_75	=	22
VGAMODE_1280_1024_85	=	23
VGAMODE_1600_1200_50	=	24
VGAMODE_1600_1200_60	=	25
VGAMODE_DEFAULT	=	0
VGAMODE_NUMMODES	=	$1a ; FIXME: obsolet 
VGACTRL_BUFFER_SHIFT	=	0
VGACTRL_FILTER_SHIFT	=	2
VGACTRL_SCANLINES_SHIFT	=	5
VGACTRL_VICSYNC_SHIFT	=	7
VGACTRL_BUFFER_MASK	=	(3 << VGACTRL_BUFFER_SHIFT)
VGACTRL_FILTER_MASK	=	(7 << VGACTRL_FILTER_SHIFT)
VGACTRL_SCANLINES_MASK	=	(3 << VGACTRL_SCANLINES_SHIFT)
VGACTRL_VICSYNC_MASK	=	(1 << VGACTRL_VICSYNC_SHIFT)
VGACTRL_SINGLEBUFFER	=	$00
VGACTRL_DOUBLEBUFFER	=	$01
VGACTRL_TRIPLEBUFFER	=	$02
VGACTRL_FILTERNEAREST	=	$00
VGACTRL_FILTERSCALE2X	=	$04
VGACTRL_FILTERALIEN	=	$08
VGACTRL_SCANLINES_OFF	=	$00
VGACTRL_SCANLINES_75P	=	$20
VGACTRL_SCANLINES_50P	=	$40
VGACTRL_SCANLINES_25P	=	$60
VGACTRL_VICSYNC	=	$80
MMUADDR0	=	$d0a0
MMUADDR1	=	$d0a1
MMUADDR2	=	$d0a2
MMUADDR3	=	$d0a3
VERIDX	=	$d0a8 ; core version info index 
VERDAT	=	$d0a9 ; core version info data 
TIMER1	=	$d0aa ; (1ms per tick)   delay 1ms 
TIMER2	=	$d0ab ; (10ms per tick)  keyboard delay 
TIMER3	=	$d0ac ; (10ms per tick)  spi timeouts, delay 10ms 
TIMER4	=	$d0ad ; (100ms per tick) quicksearch, delay 100ms 
LASTBTN	=	$d0ae
MMUSLOT	=	$d0af
LASTBTN_MASK	=	$07
LASTBTN_NONE	=	$00
LASTBTN_LEFT_SHORT	=	$02
LASTBTN_LEFT_LONG	=	$03
LASTBTN_MIDDLE_SHORT	=	$04
LASTBTN_MIDDLE_LONG	=	$05
LASTBTN_RIGHT_SHORT	=	$06
LASTBTN_RIGHT_LONG	=	$07
MMUSLOT_C64RAM0	=	$00
MMUSLOT_C64RAM1	=	$01
MMUSLOT_C64RAM2	=	$02
MMUSLOT_C64RAM3	=	$03
MMUSLOT_C64RAM4	=	$04
MMUSLOT_C64RAM5	=	$05
MMUSLOT_C64RAM6	=	$06
MMUSLOT_C64RAM7	=	$07
MMUSLOT_C64RAM8	=	$08
MMUSLOT_C64RAM9	=	$09
MMUSLOT_C64RAMA	=	$0a
MMUSLOT_C64RAMB	=	$0b
MMUSLOT_C64RAMC	=	$0c
MMUSLOT_C64RAMD	=	$0d
MMUSLOT_C64RAME	=	$0e
MMUSLOT_C64RAMF	=	$0f
MMUSLOT_REU	=	$10
MMUSLOT_GEORAM	=	$11
MMUSLOT_CARTRAM	=	$12    ; cartridge RAM 
MMUSLOT_CARTROM	=	$13    ; cartridge ROM 
MMUSLOT_MMC64ROM	=	$14
MMUSLOT_RESERVED15	=	$15
MMUSLOT_RESERVED16	=	$16
MMUSLOT_RESERVED17	=	$17
MMUSLOT_DRIVE0	=	$18
MMUSLOT_DRIVE1	=	$19
MMUSLOT_FRAMEBUFFER	=	$1c
MMUSLOT_C64CHARGEN	=	$1d
MMUSLOT_C64BASIC	=	$1e
MMUSLOT_C64KERNAL	=	$1f
MMUSLOT_MENU0	=	$20
MMUSLOT_MENU2	=	$21
MMUSLOT_MENU4	=	$22
MMUSLOT_MENU6	=	$23
MMUSLOT_MENU8	=	$24
MMUSLOT_MENUA	=	$25
MMUSLOT_MENUE	=	$26
MMUSLOT_MENUD700	=	$27
MMUSLOT_DRIVE0IMAGE0	=	$28
MMUSLOT_DRIVE0IMAGE1	=	$29
MMUSLOT_DRIVE0IMAGE2	=	$2a
MMUSLOT_DRIVE0IMAGE3	=	$2b
MMUSLOT_DRIVE1IMAGE0	=	$2c
MMUSLOT_DRIVE1IMAGE1	=	$2d
MMUSLOT_DRIVE1IMAGE2	=	$2e
MMUSLOT_DRIVE1IMAGE3	=	$2f
CFGCRT	=	$d0f0  ; cartridge emulation 
CFGSPI	=	$d0f1  ; clockport and spi emulation 
CFGVIC	=	$d0f2  ; vic-ii emulation config 
CFGTUR	=	$d0f3  ; turbo config 
CFGSID	=	$d0f4  ; SID config 
CFGREU	=	$d0f5  ; REU config 
CFGDWR	=	$d0f6  ; disk images write flags 
CFGDSK	=	$d0f7  ; disk images 
CFGFD0	=	$d0f8  ; drive emulation 
CFGFD1	=	$d0f9  ; drive emulation 
CFGREG	=	$d0fa  ; enable chameleon registers 
CFGBTN	=	$d0fb  ; button config 
CFGIO	=	$d0fc  ; i/o and cia emulation 
CFGDIS	=	$d0fd  ; disable config mode 
CFGENA	=	$d0fe  ; enable config mode 
CFGRTI	=	$d0ff  ; disable config mode 
CFGCRT_NONE	=	$00
CFGCRT_RR	=	$01 ; crt id 1: AR 9: Nordic 36: RR 
CFGCRT_KCS	=	$02 ; crt id 2 
CFGCRT_FC3	=	$03 ; crt id 3 
CFGCRT_SIMONSBASIC	=	$04 ; crt id 4 
CFGCRT_OCEAN	=	$05 ; crt id 5 
CFGCRT_EXPERT	=	$06 ; crt id 6 
CFGCRT_FUNPLAY	=	$07 ; crt id 7 
CFGCRT_SUPERGAMES	=	$08 ; crt id 8 
CFGCRT_EPYX_FASTLOAD	=	$0a ; crt id 10 
CFGCRT_WESTERMANN	=	$0b ; crt id 11 
CFGCRT_GS	=	$0f ; crt id 15 
CFGCRT_WARPSPEED	=	$10 ; crt id 16 
CFGCRT_DINAMIC	=	$11 ; crt id 17 
CFGCRT_ZAXXON	=	$12 ; crt id 18 
CFGCRT_MAGICDESK	=	$13 ; crt id 19 
CFGCRT_SSV5	=	$14 ; crt id 20 
CFGCRT_COMAL80	=	$15 ; crt id 21 
CFGCRT_ROSS	=	$17 ; crt id 23 
CFGCRT_MIKROASSEMBLER	=	$1c ; crt id 28 
CFGCRT_STARDOS	=	$1f ; crt id 31 
CFGCRT_EASYFLASH	=	$20 ; crt id 32 
CFGCRT_CAPTURE	=	$22 ; crt id 34 
CFGCRT_PROPHET64	=	$2b ; crt id 43 
CFGCRT_MACH5	=	$33 ; crt id 51 
CFGCRT_PAGEFOX	=	$35 ; crt id 53 
CFGCRT_BUSINESSBASIC	=	$36 ; crt id 54 
CFGCRT_16K_GAME	=	$fc ; crt id 0 
CFGCRT_16K_ULTIMAX	=	$fd ; crt id 0 
CFGCRT_8K_GAME	=	$fe ; crt id 0 
CFGSPI_CPNMI_SHIFT	=	(6)
CFGSPI_CP_SHIFT	=	(4)
CFGSPI_ROM_SHIFT	=	(3)
CFGSPI_MMC64_SHIFT	=	(2)
CFGSPI_SPI_SHIFT	=	(0)
CFGSPI_CPNMI_MASK	=	($40)
CFGSPI_CP_MASK	=	($30)
CFGSPI_ROM_MASK	=	($08)
CFGSPI_MMC64_MASK	=	($04)
CFGSPI_SPI_MASK	=	($03)
CFGSPI_CPNMI_DISABLED	=	(0 << CFGSPI_CPNMI_SHIFT)
CFGSPI_CPNMI_ENABLED	=	(1 << CFGSPI_CPNMI_SHIFT)
CFGSPI_CP_OFF	=	(0 << CFGSPI_CP_SHIFT)
CFGSPI_CP_DE00	=	(1 << CFGSPI_CP_SHIFT)
CFGSPI_CP_DF20	=	(2 << CFGSPI_CP_SHIFT)
CFGSPI_ROM_MMU	=	(0 << CFGSPI_ROM_SHIFT)
CFGSPI_ROM_EXTERN	=	(1 << CFGSPI_ROM_SHIFT)
CFGSPI_MMC64_ENABLED	=	(0 << CFGSPI_MMC64_SHIFT)
CFGSPI_MMC64_DISABLED	=	(1 << CFGSPI_MMC64_SHIFT)
CFGSPI_SPI_OFF	=	(0 << CFGSPI_SPI_SHIFT)
CFGSPI_SPI_MMC64	=	(1 << CFGSPI_SPI_SHIFT)
CFGSPI_SPI_EXTENDED	=	(3 << CFGSPI_SPI_SHIFT)
CFGVIC_READ_SHIFT	=	(7)
CFGVIC_FB_SHIFT	=	(6)
CFGVIC_BORDER_SHIFT	=	(4)
CFGVIC_TYPE_SHIFT	=	(0)
CFGVIC_TYPE_MASK	=	($07)
CFGVIC_READ_ENABLE	=	(1 << CFGVIC_READ_SHIFT)
CFGVIC_FB_ENABLE	=	(1 << CFGVIC_FB_SHIFT)
CFGVIC_BORDER_OPEN	=	(1 << CFGVIC_BORDER_SHIFT)
CFGVIC_TYPE_PAL	=	(0 << CFGVIC_TYPE_SHIFT)
CFGVIC_TYPE_NTSC	=	(2 << CFGVIC_TYPE_SHIFT)
CFGTUR_ENABLE_SHIFT	=	(7)
CFGTUR_SWITCH_SHIFT	=	(6)
CFGTUR_VICBIT_SHIFT	=	(5)
CFGTUR_AUTOSPD_SHIFT	=	(4)
CFGTUR_LIMIT_SHIFT	=	(0)
CFGTUR_LIMIT_MASK	=	($0f << CFGTUR_LIMIT_SHIFT)
CFGTUR_ENABLE	=	(1 << CFGTUR_ENABLE_SHIFT)
CFGTUR_SWITCH	=	(1 << CFGTUR_SWITCH_SHIFT)
CFGTUR_VICBIT	=	(1 << CFGTUR_VICBIT_SHIFT)
CFGTUR_AUTOSPD_OFF	=	(1 << CFGTUR_AUTOSPD_SHIFT)
CFGTUR_LIMIT_NONE	=	($00 << CFGTUR_LIMIT_SHIFT)
CFGTUR_LIMIT_2MHZ	=	($01 << CFGTUR_LIMIT_SHIFT)
CFGTUR_LIMIT_3MHZ	=	($02 << CFGTUR_LIMIT_SHIFT)
CFGTUR_LIMIT_4MHZ	=	($03 << CFGTUR_LIMIT_SHIFT)
CFGTUR_LIMIT_5MHZ	=	($04 << CFGTUR_LIMIT_SHIFT)
CFGTUR_LIMIT_6MHZ	=	($05 << CFGTUR_LIMIT_SHIFT)
CFGTUR_LIMIT_1MHZ	=	($0c << CFGTUR_LIMIT_SHIFT)
CFGTUR_LIMIT_750KHZ	=	($0d << CFGTUR_LIMIT_SHIFT)
CFGTUR_LIMIT_500KHZ	=	($0e << CFGTUR_LIMIT_SHIFT)
CFGTUR_LIMIT_250KHZ	=	($0f << CFGTUR_LIMIT_SHIFT)
CFGSID_TYPE1_SHIFT	=	(7)
CFGSID_TYPE0_SHIFT	=	(6)
CFGSID_REAL_SHIFT	=	(3)
CFGSID_EMU_SHIFT	=	(0)
CFGSID_TYPE1_MASK	=	(1 << CFGSID_TYPE1_SHIFT)
CFGSID_TYPE0_MASK	=	(1 << CFGSID_TYPE0_SHIFT)
CFGSID_REAL_MASK	=	(7 << CFGSID_REAL_SHIFT)
CFGSID_EMU_MASK	=	(7 << CFGSID_EMU_SHIFT)
CFGSID_TYPE1_6581	=	(0 << CFGSID_TYPE1_SHIFT)
CFGSID_TYPE1_8580	=	(1 << CFGSID_TYPE1_SHIFT)
CFGSID_TYPE0_6581	=	(0 << CFGSID_TYPE0_SHIFT)
CFGSID_TYPE0_8580	=	(1 << CFGSID_TYPE0_SHIFT)
CFGSID_REAL_MONO	=	(0 << CFGSID_REAL_SHIFT)
CFGSID_REAL_STEREO_D4	=	(1 << CFGSID_REAL_SHIFT)
CFGSID_REAL_STEREO_D5	=	(4 << CFGSID_REAL_SHIFT)
CFGSID_REAL_STEREO_D7	=	(5 << CFGSID_REAL_SHIFT)
CFGSID_REAL_STEREO_DE	=	(6 << CFGSID_REAL_SHIFT)
CFGSID_REAL_STEREO_DF	=	(7 << CFGSID_REAL_SHIFT)
CFGSID_EMU_MONO	=	(0 << CFGSID_EMU_SHIFT)
CFGSID_EMU_STEREO_D4	=	(1 << CFGSID_EMU_SHIFT) ; actually D4xx, see progman 
CFGSID_EMU_STEREO_D5	=	(4 << CFGSID_EMU_SHIFT) ; same as _D7, see progman 
CFGSID_EMU_STEREO_D7	=	(5 << CFGSID_EMU_SHIFT) ; same as _D5, see progman 
CFGSID_EMU_STEREO_DE	=	(6 << CFGSID_EMU_SHIFT)
CFGSID_EMU_STEREO_DF	=	(7 << CFGSID_EMU_SHIFT)
CFGREU_REU_ENABLE_SHIFT	=	(7)
CFGREU_GEORAM_ENABLE_SHIFT	=	(6)
CFGREU_GEORAM_SIZE_SHIFT	=	(3)
CFGREU_REU_SIZE_SHIFT	=	(0)
CFGREU_REU_ENABLE	=	(1 << CFGREU_REU_ENABLE_SHIFT)
CFGREU_GEORAM_ENABLE	=	(1 << CFGREU_GEORAM_ENABLE_SHIFT)
CFGREU_GEORAM_64K	=	(0 << CFGREU_GEORAM_SIZE_SHIFT)
CFGREU_GEORAM_128K	=	(1 << CFGREU_GEORAM_SIZE_SHIFT)
CFGREU_GEORAM_256K	=	(2 << CFGREU_GEORAM_SIZE_SHIFT)
CFGREU_GEORAM_512K	=	(3 << CFGREU_GEORAM_SIZE_SHIFT)
CFGREU_GEORAM_1M	=	(4 << CFGREU_GEORAM_SIZE_SHIFT)
CFGREU_GEORAM_2M	=	(5 << CFGREU_GEORAM_SIZE_SHIFT)
CFGREU_GEORAM_4M	=	(6 << CFGREU_GEORAM_SIZE_SHIFT)
CFGREU_REU_128K	=	(0 << CFGREU_REU_SIZE_SHIFT)
CFGREU_REU_256K	=	(1 << CFGREU_REU_SIZE_SHIFT)
CFGREU_REU_512K	=	(2 << CFGREU_REU_SIZE_SHIFT)
CFGREU_REU_1M	=	(3 << CFGREU_REU_SIZE_SHIFT)
CFGREU_REU_2M	=	(4 << CFGREU_REU_SIZE_SHIFT)
CFGREU_REU_4M	=	(5 << CFGREU_REU_SIZE_SHIFT)
CFGREU_REU_8M	=	(6 << CFGREU_REU_SIZE_SHIFT)
CFGREU_REU_16M	=	(7 << CFGREU_REU_SIZE_SHIFT)
CFGDWR_FD1_IMG3_SHIFT	=	(7)
CFGDWR_FD1_IMG2_SHIFT	=	(6)
CFGDWR_FD1_IMG1_SHIFT	=	(5)
CFGDWR_FD1_IMG0_SHIFT	=	(4)
CFGDWR_FD0_IMG3_SHIFT	=	(3)
CFGDWR_FD0_IMG2_SHIFT	=	(2)
CFGDWR_FD0_IMG1_SHIFT	=	(1)
CFGDWR_FD0_IMG0_SHIFT	=	(0)
CFGDWR_FD1_IMG3	=	(1 << CFGDWR_FD1_IMG3_SHIFT)
CFGDWR_FD1_IMG2	=	(1 << CFGDWR_FD1_IMG2_SHIFT)
CFGDWR_FD1_IMG1	=	(1 << CFGDWR_FD1_IMG1_SHIFT)
CFGDWR_FD1_IMG0	=	(1 << CFGDWR_FD1_IMG0_SHIFT)
CFGDWR_FD0_IMG3	=	(1 << CFGDWR_FD0_IMG3_SHIFT)
CFGDWR_FD0_IMG2	=	(1 << CFGDWR_FD0_IMG2_SHIFT)
CFGDWR_FD0_IMG1	=	(1 << CFGDWR_FD0_IMG1_SHIFT)
CFGDWR_FD0_IMG0	=	(1 << CFGDWR_FD0_IMG0_SHIFT)
CFGDSK_FD1_NUMIMAGES_SHIFT	=	(6)
CFGDSK_FD1_ACTIVEIMG_SHIFT	=	(4)
CFGDSK_FD0_NUMIMAGES_SHIFT	=	(2)
CFGDSK_FD0_ACTIVEIMG_SHIFT	=	(0)
CFGDSK_FD1_NUMIMAGES_MASK	=	(3 << CFGDSK_FD1_NUMIMAGES_SHIFT)
CFGDSK_FD1_ACTIVEIMG_MASK	=	(3 << CFGDSK_FD1_ACTIVEIMG_SHIFT)
CFGDSK_FD0_NUMIMAGES_MASK	=	(3 << CFGDSK_FD0_NUMIMAGES_SHIFT)
CFGDSK_FD0_ACTIVEIMG_MASK	=	(3 << CFGDSK_FD0_ACTIVEIMG_SHIFT)
CFGFD0_ENABLE_CPU_RUNNING_SHIFT	=	(6)
CFGFD0_DRIVE_DOOR_OPEN_SHIFT	=	(5)
CFGFD0_WRITE_PROTECT_SHIFT	=	(4)
CFGFD0_MEMSIZE_SHIFT	=	(2)
CFGFD0_DRIVE_ID_SHIFT	=	(0)
CFGFD0_ENABLE_CPU_MASK	=	(1 << CFGFD0_ENABLE_CPU_RUNNING_SHIFT)
CFGFD0_DRIVE_DOOR_MASK	=	(1 << CFGFD0_DRIVE_DOOR_OPEN_SHIFT)
CFGFD0_WRITE_PROTECT_MASK	=	(1 << CFGFD0_WRITE_PROTECT_SHIFT)
CFGFD0_MEMSIZE_MASK	=	(1 << CFGFD0_MEMSIZE_SHIFT)
CFGFD0_DRIVE_ID_MASK	=	(3 << CFGFD0_DRIVE_ID_SHIFT)
CFGFD0_ENABLE_CPU_RUNNING	=	(1 << CFGFD0_ENABLE_CPU_RUNNING_SHIFT)
CFGFD0_ENABLE_CPU_STOPPED	=	(0 << CFGFD0_ENABLE_CPU_RUNNING_SHIFT)
CFGFD0_DRIVE_DOOR_OPEN	=	(1 << CFGFD0_DRIVE_DOOR_OPEN_SHIFT)
CFGFD0_DRIVE_DOOR_CLOSED	=	(0 << CFGFD0_DRIVE_DOOR_OPEN_SHIFT)
CFGFD0_WRITE_PROTECT_ON	=	(1 << CFGFD0_WRITE_PROTECT_SHIFT)
CFGFD0_WRITE_PROTECT_OFF	=	(0 << CFGFD0_WRITE_PROTECT_SHIFT)
CFGFD0_MEMSIZE_2K	=	(0 << CFGFD0_MEMSIZE_SHIFT)
CFGFD0_MEMSIZE_8K	=	(1 << CFGFD0_MEMSIZE_SHIFT)
CFGFD0_DRIVE_ID8	=	(0 << CFGFD0_DRIVE_ID_SHIFT)
CFGFD0_DRIVE_ID9	=	(1 << CFGFD0_DRIVE_ID_SHIFT)
CFGFD0_DRIVE_ID10	=	(2 << CFGFD0_DRIVE_ID_SHIFT)
CFGFD0_DRIVE_ID11	=	(3 << CFGFD0_DRIVE_ID_SHIFT)
CFGFD1_ENABLE_CPU_RUNNING_SHIFT	=	(6)
CFGFD1_DRIVE_DOOR_OPEN_SHIFT	=	(5)
CFGFD1_WRITE_PROTECT_SHIFT	=	(4)
CFGFD1_MEMSIZE_SHIFT	=	(2)
CFGFD1_DRIVE_ID_SHIFT	=	(0)
CFGFD1_ENABLE_CPU_MASK	=	(1 << CFGFD1_ENABLE_CPU_RUNNING_SHIFT)
CFGFD1_DRIVE_DOOR_MASK	=	(1 << CFGFD1_DRIVE_DOOR_OPEN_SHIFT)
CFGFD1_WRITE_PROTECT_MASK	=	(1 << CFGFD1_WRITE_PROTECT_SHIFT)
CFGFD1_MEMSIZE_MASK	=	(1 << CFGFD1_MEMSIZE_SHIFT)
CFGFD1_DRIVE_ID_MASK	=	(3 << CFGFD1_DRIVE_ID_SHIFT)
CFGFD1_ENABLE_CPU_RUNNING	=	(1 << CFGFD1_ENABLE_CPU_RUNNING_SHIFT)
CFGFD1_ENABLE_CPU_STOPPED	=	(0 << CFGFD1_ENABLE_CPU_RUNNING_SHIFT)
CFGFD1_DRIVE_DOOR_OPEN	=	(1 << CFGFD1_DRIVE_DOOR_OPEN_SHIFT)
CFGFD1_DRIVE_DOOR_CLOSED	=	(0 << CFGFD1_DRIVE_DOOR_OPEN_SHIFT)
CFGFD1_WRITE_PROTECT_ON	=	(1 << CFGFD1_WRITE_PROTECT_SHIFT)
CFGFD1_WRITE_PROTECT_OFF	=	(0 << CFGFD1_WRITE_PROTECT_SHIFT)
CFGFD1_MEMSIZE_2K	=	(0 << CFGFD1_MEMSIZE_SHIFT)
CFGFD1_MEMSIZE_8K	=	(1 << CFGFD1_MEMSIZE_SHIFT)
CFGFD1_DRIVE_ID8	=	(0 << CFGFD1_DRIVE_ID_SHIFT)
CFGFD1_DRIVE_ID9	=	(1 << CFGFD1_DRIVE_ID_SHIFT)
CFGFD1_DRIVE_ID10	=	(2 << CFGFD1_DRIVE_ID_SHIFT)
CFGFD1_DRIVE_ID11	=	(3 << CFGFD1_DRIVE_ID_SHIFT)
CFGREG_IOROM_SHIFT	=	(5)
CFGREG_PALETTE_SHIFT	=	(3)
CFGREG_MMU_SHIFT	=	(1)
CFGREG_VGA_SHIFT	=	(0)
CFGREG_IOROM_ENABLE	=	(1 << CFGREG_IOROM_SHIFT)
CFGREG_PALETTE_ENABLE	=	(1 << CFGREG_PALETTE_SHIFT)
CFGREG_MMU_ENABLE	=	(1 << CFGREG_MMU_SHIFT)     ; also enables timer registers 
CFGREG_VGA_ENABLE	=	(1 << CFGREG_VGA_SHIFT)
CFGBTN_DEBUG_INFO_SHIFT	=	(6)
CFGBTN_BUTTONS_SHIFT	=	(0)
CFGBTN_DEBUG_INFO_MASK	=	(3 << CFGBTN_DEBUG_INFO_SHIFT)
CFGBTN_BUTTONS_MASK	=	($f << CFGBTN_BUTTONS_SHIFT)
CFGBTN_DEBUG_INFO_NONE	=	(0 << CFGBTN_DEBUG_INFO_SHIFT)
CFGBTN_DEBUG_INFO_CPU	=	(1 << CFGBTN_DEBUG_INFO_SHIFT)
CFGBTN_DEBUG_INFO_DRIVE1	=	(2 << CFGBTN_DEBUG_INFO_SHIFT)
CFGBTN_DEBUG_INFO_FULL	=	(3 << CFGBTN_DEBUG_INFO_SHIFT)
CFGBTN_LEFT_MENU	=	(0 << CFGBTN_BUTTONS_SHIFT) ; menu (same as 0.7 sec middle) 
CFGBTN_LEFT_CART_BUTTON	=	(1 << CFGBTN_BUTTONS_SHIFT) ; cartridge on/off/prg 
CFGBTN_LEFT_TURBO	=	(2 << CFGBTN_BUTTONS_SHIFT) ; turbo on/off 
CFGBTN_LEFT_RESERVED	=	(3 << CFGBTN_BUTTONS_SHIFT)
CFGBTN_LEFT_DISK0	=	(4 << CFGBTN_BUTTONS_SHIFT) ; disk change drive 1 
CFGBTN_LEFT_DISK1	=	(5 << CFGBTN_BUTTONS_SHIFT) ; disk change drive 2 
CFGIO_IEC_PORT_SHIFT	=	(7)
CFGIO_IEC_RESET_SHIFT	=	(6)
CFGIO_MOUSE_DISABLED_SHIFT	=	(5)
CFGIO_MOUSE_PORT_SHIFT	=	(4)
CFGIO_IR_DISABLED_SHIFT	=	(3)
CFGIO_RESET_MENU_SHIFT	=	(2)
CFGIO_C64IEC_PORT_SHIFT	=	(0)
CFGIO_IEC_CONNECTED	=	(0 << CFGIO_IEC_PORT_SHIFT)
CFGIO_IEC_DISCONNECTED	=	(1 << CFGIO_IEC_PORT_SHIFT)
CFGIO_IEC_RESET	=	(1 << CFGIO_IEC_RESET_SHIFT)
CFGIO_MOUSE_DISABLED	=	(1 << CFGIO_MOUSE_DISABLED_SHIFT)
CFGIO_MOUSE_ENABLED	=	(0 << CFGIO_MOUSE_DISABLED_SHIFT)
CFGIO_MOUSE_PORT2	=	(1 << CFGIO_MOUSE_PORT_SHIFT)
CFGIO_MOUSE_PORT1	=	(0 << CFGIO_MOUSE_PORT_SHIFT)
CFGIO_IR_DISABLED	=	(1 << CFGIO_IR_DISABLED_SHIFT)
CFGIO_IR_ENABLED	=	(0 << CFGIO_IR_DISABLED_SHIFT)
CFGIO_RESET_MENU	=	(1 << CFGIO_RESET_MENU_SHIFT)
CFGIO_C64IEC_CONNECTED	=	(0 << CFGIO_C64IEC_PORT_SHIFT)
CFGIO_C64IEC_DISCONNECTED	=	(1 << CFGIO_C64IEC_PORT_SHIFT)
CFGDIS_VICSTATUS_SHIFT	=	(7)
CFGDIS_CP_STATUS_SHIFT	=	(5) ; readback of reset line 
CFGDIS_SLOTSTATUS_SHIFT	=	(4)
CFGDIS_SLOT_SHIFT	=	(0)
CFGDIS_VICSTATUS_MASK	=	($01 << CFGDIS_VICSTATUS_SHIFT)
CFGDIS_CP_STATUS_MASK	=	($01 << CFGDIS_CP_STATUS_SHIFT)
CFGDIS_SLOTSTATUS_MASK	=	($01 << CFGDIS_SLOTSTATUS_SHIFT)
CFGDIS_SLOT_MASK	=	($0f << CFGDIS_SLOT_SHIFT)
CFGDIS_CP_STATUS_OK	=	($00 << CFGDIS_CP_STATUS_SHIFT)
CFGDIS_DISABLE_CFG	=	(0)
CFGENA_ENABLE_CFG	=	42     ; enable config mode 
CFGENA_DISABLE_CFG	=	$ff   ; disable config mode 
CFGENA_START_CORE	=	$10   ; OR with core slot number to start core (in config/menu mode)  
CFGENA_MENU_MODE	=	$20   ; force menu mode (in config mode) 
CFGENA_MENU_MODE_DISABLE_NMI	=	$21   ; force menu mode, disable NMI (in config mode) 
CFGENA_ENABLE_NMI	=	$22   ; enable NMI (in config/menu mode) 
CFGENA_DISABLE_NMI	=	$23   ; disable NMI (in config/menu mode) 
CFGENA_RESET	=	$a5   ; soft reset (in config/menu mode) 
CFGENA_RESET_EXIT_CFG	=	$a6   ; soft reset, leave config mode (in config/menu mode) 
CFGENA_CARTRIDGE	=	$01
CFGENA_STANDALONE	=	$a1
CFGENA_CONE	=	$c1
CFGENA_DOCKINGSTATION	=	$d1
CFGRTI_DISABLE_CFG	=	(0)
PALRED	=	$d100
PALGRN	=	$d200
PALBLU	=	$d300
SPI_DATA	=	$df10
SPI_CTRL	=	$df11
SPI_STATUS	=	$df12
SPI_CTRL_TRIGGER_SHIFT	=	(6)
SPI_CTRL_SELECT1_SHIFT	=	(4)
SPI_CTRL_SPEED_SHIFT	=	(2)
SPI_CTRL_SELECT0_SHIFT	=	(1)
SPI_CTRL_WRITE_TRIGGER	=	(0 << SPI_CTRL_TRIGGER_SHIFT)
SPI_CTRL_READ_TRIGGER	=	(1 << SPI_CTRL_TRIGGER_SHIFT)
SPI_CTRL_SELECT_MASK	=	((1 << SPI_CTRL_SELECT1_SHIFT) | (1 << SPI_CTRL_SELECT0_SHIFT))
SPI_CTRL_SELECT_MMC	=	((0 << SPI_CTRL_SELECT1_SHIFT) | (0 << SPI_CTRL_SELECT0_SHIFT))
SPI_CTRL_SELECT_NONE	=	((0 << SPI_CTRL_SELECT1_SHIFT) | (1 << SPI_CTRL_SELECT0_SHIFT))
SPI_CTRL_SELECT_FLASH	=	((1 << SPI_CTRL_SELECT1_SHIFT) | (0 << SPI_CTRL_SELECT0_SHIFT))
SPI_CTRL_SELECT_RTC	=	((1 << SPI_CTRL_SELECT1_SHIFT) | (1 << SPI_CTRL_SELECT0_SHIFT))
SPI_CTRL_SPEED_250KHZ	=	(0 << SPI_CTRL_SPEED_SHIFT)
SPI_CTRL_SPEED_8MHZ	=	(1 << SPI_CTRL_SPEED_SHIFT)
SPI_STATUS_MMC_WRITE_PROTECT_SHIFT	=	(4)
SPI_STATUS_MMC_PRESENT_SHIFT	=	(3)
SPI_STATUS_BUSY_SHIFT	=	(0)
SPI_STATUS_CARDRO	=	(1 << SPI_STATUS_MMC_WRITE_PROTECT_SHIFT)
SPI_STATUS_NOCARD	=	(1 << SPI_STATUS_MMC_PRESENT_SHIFT)
SPI_STATUS_BUSY	=	(1 << SPI_STATUS_BUSY_SHIFT)
RTC_CMD_READ	=	($80 | $10)
RTC_CMD_WRITE	=	($00 | $10)
RTC_REG_CTRL1	=	$00
RTC_REG_CTRL2	=	$01
RTC_REG_SECOND	=	$02
RTC_REG_MINUTE	=	$03
RTC_REG_HOUR	=	$04
RTC_REG_DAY	=	$05
RTC_REG_WEEKDAY	=	$06
RTC_REG_MONTH	=	$07
RTC_REG_YEAR	=	$08
RTC_REG_ALARM_MINUTE	=	$09
RTC_REG_ALARM_HOUR	=	$0a
RTC_REG_ALARM_DAY	=	$0b
RTC_REG_ALARM_WEEKDAY	=	$0c
RTC_REG_OFFSET	=	$0d
RTC_REG_TIMEOUT	=	$0e
RTC_REG_COUNTDOWN	=	$0f
FLASH_CMD_PAGE_PROGRAM	=	$02
FLASH_CMD_READ_DATA	=	$03
FLASH_CMD_READ_STATUS	=	$05
FLASH_CMD_WRITE_ENABLE	=	$06
FLASH_CMD_ERASE	=	$20
FLASH_STATUS_BUSY	=	$01
RAMBASE_C64	=	$00000000 ; 64 KByte RAM for C64 mode 
RAMBASE_CFGROM	=	$00100000 ; 32kb Startup and initialization ROM (Bootloader) 
RAMBASE_MMC64	=	$00108000 ; 8kb MMC64 BIOS image 
RAMBASE_BASIC	=	$0010a000 ; 8kb BASIC V2 ROM image 
RAMBASE_MENU_CHARGEN	=	$0010c000 ; 4kb Character ROM image 
RAMBASE_CHARGEN	=	$0010d000 ; 4kb Character ROM image 
RAMBASE_KERNAL	=	$0010e000 ; 8kb Kernal ROM image 
RAMBASE_DEFCRT1	=	$00110000 ; 64k (Slot1) (default: NTSC RR) 
RAMBASE_DEFCRT0	=	$00120000 ; 64k (Slot0) (default: PAL RR) 
RAMBASE_MENU	=	$00130000 ; 64k Chameleon menu system 
RAMBASE_MENUOVL	=	$00140000 ; 64k Chameleon menu system - overlays (8k each) 
RAMBASE_PLUGINS	=	$00150000 ; 2*64k Chameleon menu system - plugins (4k each) 
RAMBASE_DRIVEROM	=	$00180000 ; 16k 1541 floppy drive ROM , copied to RAMBASE_DRIVEn 
RAMBASE_DRIVE0	=	$00180000
RAMBASE_DRIVE1	=	$00190000
RAMBASE_FREEZER	=	$001a0000 ; menu system freezer buffer 
RAMBASE_MENUSCREENS	=	$001b0000 ; menu system screens buffer 
RAMBASE_MENUCFGBUFFER	=	$001d0000 ; 1 64k block buffered from flash 
RAMBASE_MENUCFGDATA	=	$001dfe00 ; last two pages used for config data 
RAMBASE_PLUGBUF	=	$001e0000 ; buffer used by plugins 
RAMBASE_MOUNTLIST	=	$001f0000 ; disk image mount info 
RAMBASE_DIRBUF0	=	$00200000 ; filebrowser directory entries 
RAMBASE_DIRBUF0PLG	=	$00210000
RAMBASE_DIRBUF1	=	$00220000
RAMBASE_DIRBUF1PLG	=	$00230000
RAMBASE_MENUBUFFERS	=	RAMBASE_FREEZER
RAMBASE_MENUBUFFERS_LEN	=	((RAMBASE_DIRBUF1PLG + $10000) - RAMBASE_FREEZER)
RAMBASE_DEFCRT0RAM	=	$00240000 ; 64k Cartridge RAM (Slot0) 
RAMBASE_DEFCRT1RAM	=	$00250000 ; 64k Cartridge RAM (Slot1) 
RAMBASE_USERCRT0RAM	=	$00260000 ; 64k Cartridge RAM (Slot2) 
RAMBASE_USERCRT1RAM	=	$00270000 ; 64k Cartridge RAM (Slot3) 
RAMBASE_DISK0CACHE	=	$00280000
RAMBASE_DISK0ERRCACHE	=	($00280000+205312)
RAMBASE_DISK1CACHE	=	$002c0000
RAMBASE_DISK1ERRCACHE	=	($002c0000+205312)
RAMBASE_DISK0	=	$00300000 ; 3mb drive 0 images 
RAMBASE_DISK0IMG0	=	(RAMBASE_DISK0 + ($00000000))
RAMBASE_DISK0IMG1	=	(RAMBASE_DISK0 + ($000a8000))
RAMBASE_DISK0IMG2	=	(RAMBASE_DISK0 + ($00150000))
RAMBASE_DISK0IMG3	=	(RAMBASE_DISK0 + ($001f8000))
RAMBASE_VRAM	=	$00600000
RAMBASE_DISK1	=	$00700000 ; 3mb drive 1 images 
RAMBASE_DISK1IMG0	=	(RAMBASE_DISK1 + ($00000000))
RAMBASE_DISK1IMG1	=	(RAMBASE_DISK1 + ($000a8000))
RAMBASE_DISK1IMG2	=	(RAMBASE_DISK1 + ($00150000))
RAMBASE_DISK1IMG3	=	(RAMBASE_DISK1 + ($001f8000))
RAMBASE_USERCRT0	=	$00a00000
RAMBASE_USERCRT1	=	$00b00000
RAMBASE_GEORAM	=	$00c00000 ; 4Mb geoRAM memory 
RAMBASE_REU	=	$01000000 ; 16Mb REU