GMOD3 stress test
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test-flasher.prg is a self contained flasher that flashes the test program plus
a test pattern to the cartridge. insert the gmod3 cartridge, run test-flasher.
get a coffee or two because that will take a long time.

test.prg is the actual test program that runs when you start the cartridge. It
can also be loaded seperatly after skipping the cartridge boot incase that does
not work correctly.

you can skip the test program by holding the left arrow on reset/powerup

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The content of the test cartridge looks like this:

first 16k (bank 0/1)    : startup code, test program, 8k random data (reference)
third bank              : lda/ldx/ldy testcode

other banks:        : random data, 
                        even bytes EORed with bank hibyte,
                        odd bytes EORed with bank lobyte

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currently the following test are done:

- the test program is copied from cartridge to c64 RAM. after that the test
  program compares itself with the ROM again to make sure the copy was ok

- now short bursts of code are being executed from ROM, with sprites enabled
  and 2Mhz mode (on c128) being toggled on/off every 32 tests. this runs for
  a while.

- now linear reads from ROM happen with code executed from RAM

when a test fails, press SPACE to continue

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memory layout of "rom code" test:

C64 RAM:

- screen at $0400, filled with $01 (-> badline fetches $01 from $0400-$07e8)
- charset at $0000, char $01 is filled with $a5

Cartridge ROM: (Bank 2) code pattern repeated every 8 bytes

.C:8000  A9 00       LDA #$00   <- rom offset >> 8 (00...1f)
.C:8002  A2 00       LDX #$00   <- rom offset >> 7 (00...3f)
.C:8004  A0 00       LDY #$00   <- rom offset >> 6 (00...7f)
.C:8006  60          RTS
.C:8007  00          BRK

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Userport pins:

PB7 -   =1 on error (starts with 0)
PB6 -   toggles after the ROM bank was changed (starts with 0)
PB5 -   toggles before reading from ROM (starts with 0)

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TODO:
- perhaps also secure the test.prg by a crc32

- show current test nr. and number of total runs

- add test variants that cause dummy fetches to happen, ie when using indexed
  adressing with page boundary crossing

- add variant of the read test that reads from random addresses/banks instead
  of linear reads

- display whether 2MHz mode was enabled or not

- some extra(?) test to check the vectors